The present disclosure relates generally to semiconductor manufacturing technology and, more particularly to a structure and method for improving die saw quality.
In semiconductor processing, a plurality of dies, each containing an integrated circuit, may fabricated on a semiconductor wafer. Scribe lines may be provided between adjacent dies so that the dies can be separated without damaging the circuit during processing. Typically, stresses induced by semiconductor back-end-of-line (BEOL) processes, such as die-sawing, packing, and plastic modeling, cause serious peeling and delamination starting from the die corners. Existing methods include die saw blade improvement and seal ring consolidation. Although these approaches have been satisfactory for their intended purposes, they have not been satisfactory in all respects. Accordingly, severe peeling and/or delamination resulting from BEOL processing are still observed, particularly in the die corner areas. Thus, what is needed is a cost-effective semiconductor structure that improves die saw quality.